This invention is related in general to device fabrication and in particular to structures and methods for fabricating an integrated HBT/FET device (a “BiFET”).
Field effect transistors (FETs) and heterojunction bipolar transistors (HBTs) are two common transistor families. The family of FET transistors includes a number of different FET devices having different structures. Members of the FET family include heterostructure field effect transistors (HFET), homogenous field effect transistors (e.g., MESFET, JFET) and metal oxide semiconductor FET transistors (MOSFET).
Devices from the HBT family and the FET family have advantages and disadvantages that render them more suited to certain applications. For instance, HBT devices have excellent reliability, linearity, and high power capability. This makes an HBT a desirable device technology for power amplifiers and related applications. Meanwhile, a pHEMT (a type of HFET) has operational characteristics that make it a desirable device for a low noise amplifier or a switch and other related applications.
Conventionally, to combine a FET device and an HBT device on a single substrate, multiple growth cycles would be utilized in a common growth environment. However, the resulting BiFET performance is compromised since the growth of highly doped materials from the HBT device introduces impurities into the subsequent growth of the FET device, which limits the reproducibility and control.
There is a need for a fabrication method which results in a BiFET device that has operational characteristics comparable to the operational characteristics of a FET device and an HBT device that are fabricated separately on different substrates.